Call For Papers
The IEEE Electrical Design of Advanced Packaging and Systems (EDAPS) Symposium is the premier international conference in Asia-Pacific region to share the recent progress of design, modeling, simulation and measurement related to the electrical issues arising at the chip, package and system levels. Covering the paper presentations, industry exhibitions, workshops and tutorials, EDAPS 2025 will be held at the at Hokkaido University, Sapporo, Japan, December 15-17, 2025.
Papers should be submitted electronically in two-column and three-page PDF file format through the EDAPS website (www.edaps.org). A Microsoft Word template is available on the symposium website. Hardcopy submissions will NOT be accepted. Submitted manuscripts should be camera ready and compliant with the general standards of the IEEE, including appropriate referencing. Non-compliant manuscripts will not be considered for review.
DEADLINES
- Prospective authors should submit a three-page manuscript by July 18, 2025.
- Notification about acceptance will be given by September 1, 2025.
- Accepted papers will be reproduced as-is in the Conference Proceedings.
For a PDF version of the call for papers, please click here.
The symposium will consist of oral and poster presentations. In addition, a number of prominent experts will be giving keynote lectures and tutorials on areas of emerging interest. The official language is English.Conference Topics
- 3D-ICs/TSVs/Interposers
- Testing on 3D-IC and SiP
- Signal and Thermal Integrity
- Power Integrity and Power Distribution Networks (PDNs)
- Computational Electromagnetics and Multi-physics Modeling
- Thermal Management for 3D-ICs and SiP
- Design/Modeling of High-speed Channels and Interconnects
- High-Speed Wireline Communication
- Jitter Analysis and Modeling Algorithms
- Time/Frequency Domain Measurement Techniques
- Power Supply Induced Jitter
- Nanoelectronics for 3D-ICs and SiP
- Machine Learning Applied to Packaging
- Active Devices and Circuit Modeling Technologies
- Electronic Packages, SiP/SoP
- IC and Package Level EMC
- Antennas in Packages (AiP)
- RF/mm-wave and THz Packages
- Miniaturized and Embedded Passives
- Power Electronic Packages
- Advanced Simulation Tools and CAD
- Substrate Technology for Packages and PCBs
- Electrical Design of Flexible Devices and Sensing
- 2-D Materials for 3D-ICs and SiP
- 3-D ICs and SiP Reliability
- Electrical Design for 5G Wireless Communication
- SI/PI Analysis of High-Speed Channels
- Others
Deadline: July 18, 2025
Submission Format: 2 column, 3-page, PDF format only.
Submitted manuscripts should be camera ready and compliant with the general standards of the IEEE, including appropriate referencing. Noncompliant manuscripts will not be considered for review.
Location: at Hokkaido University, Sapporo, Japan
Exhibits: EDAPS-2025 will be exciting forum for vendors to demonstrate their state-of-the-art-tools to the attendees. Interested vendors can contact the conference administration for more details.
For more information, please contact: edaps2025@enhal.com