EDAPS

Tutorial I


Monday, December 12, 2022,
10:00-10:40 AM, China Standard Time

Predictive Modeling Methodologies for Automotive Power Converters EMC Testing
Rajen Murugan, Texas Instruments
Dipanjan Gope, Indian Institute of Science


Abstract - Failing automotive regulatory EMC standards compliance requirements in the EMC test lab can lead to potential business impact. Increased time-to-market, multiple design iterations, and the recurrent high cost of EMC tests can paralyze chip suppliers' competitiveness. Additionally, with the push, driven by market needs, for more hybrid and electric vehicles (EVs), the electromagnetic immunity ecosystem in an automobile is aggressively being strained. As such, the need to predict EMC emission and immunity performance for "safety critical" automotive systems are pressing. This tutorial presents the current state-of-the-art EMC modeling and challenges focusing on power electronics, particularly automotive DCDC converters. Sources and mechanisms of EMI (electromagnetic interference) noises typical of an automotive source synchronous DCDC converter are identified. A system-level modeling methodology that allows the predictability of automotive device emission testing early in the design phase is presented. The scalability of the modeling methodology to address IC-centric EMC immunity testings (e.g., bulk-current injection, BCI, direct-power injection, DPI) is also demonstrated through real-life automotive semiconductor designs. Finally, current EMC modeling challenges and potential future research areas in automotive EMC tests are discussed.




Dr. Rajen Murugan specializes in developing complex analog and mixed-signal IC packaging and systems multiphysics modeling and analysis methodologies. He is a Distinguished Member of Technical Staff (DMTS) with Texas Instruments, Inc. He currently has 20 patents (38 pending) and has published over 60 papers in IEEE peer-reviewed journals and conferences. Dr. Murugan holds a Ph.D. in Applied Electromagnetics from the University of Manitoba, Canada. He is currently an Affiliate Assistant Professor with the University of Washington EE Department, a Distinguished Lecturer for IEEE Electronics Packaging Society (EPS), a Senior Member of IEEE, the Vice Chair of the IEEE EPS Dallas Chapter, and the Chair of the IEEE Dallas Section (R5).





Dipanjan Gope, PhD, is Associate Professor in Electrical Communication Engineering at Indian Institute of Science, Bangalore. He is also co-founder and CEO at Simyog Technology Pvt. Ltd. a spin-off from IISc focused on Design and Sign-off tools for Automotive Electronics. His research interests include computational electromagnetics with applications in signal integrity, power integrity, EMI for high speed chip-package-systems, RF sensing for IoT applications, parallel programming for many-core and cloud infrastructures. Dr. Gope is a founding member at Nimbic (acquired by Mentor Graphics) where he served as Vice President, R&D from 2007-2011 and 2013-2014. Between 2005-2007, he was a Senior CAD engineer at Intel where he was a recipient of a divisional award for contributions towards providing signal integrity solution to Intel architecture platforms. He has more than 80 journal and conference publications. Dr. Gope received his PhD and M.S. degrees in Electrical Engineering from the University of Washington, Seattle and BTech in Electronics and Electrical Communication Engineering from the Indian Institute of Technology, Kharagpur.