Return2022 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), Virtual Event - December 12-14, 2022 - Preliminary Program

Preliminary Program                                                                                                                                    All Times are China Standard Time

Monday, December 12, 2022 Tuesday, December 13, 2022 Wednesday, December 14, 2022
EDAPS TUTORIALS
Tutorial 1
Moderator: Nikita Ambasana, Intel

10:00 - 10:40
  • Predictive Modeling Methodologies for Automotive Power Converters EMC Testing
    Dipanjan Gope*, Rajen Murugan+
    *IISC,
    +Texas Instruments

10:40 - 10:50
Cadence Presentation

Tutorial 2
Moderator: Thong Nguyen,UIUC

10:50 - 11:30
  • Reinforcement Learning Methodologies for Package and Interconnect Design
    Haeyeon Kim
    KAIST

11:30 - 12:10
Packaging Benchmark

Tutorial 3
Moderator: Thong Nguyen, UIUC

12:10 - 12:50
  • Universal Chiplet Interconnect Express - an Overview
    Ramaswamy Parthasarathy
    Intel

12:50 - 13:00
Qualcomm Presentation

Tutorial 4
Moderator: Jose Schutt-Aine,UIUC

13:00 - 13:40
  • The basis for Artificial Neural Networks as Powerful Machine Learning Engines - Applications of Perceptron, MultiLayer Perceptron and Convolutional Neural Networks
    Author: Mahendra Gooroochurn
    University of Mauritius

13:40 - 14:10
TC-EDMS

14:10 - 14:20
Day 1 Wrap Up

10:00 - 10:10
Welcome
10:10 - 10:50
Keynote Presentation
Chair: Jose Schutt-Aine, UIUC
  • Meeting High Speed Interface Performance at Reduced System Cost: From Low-Cost Mobile, IoT to High Performance Compute
    Goutham Sabavat
    Qualcomm
11:00 - 13:00
Session 1: Power Integrity
Chair: Arun Chandrasekhar, Intel
  • T-I.1. Design and Analysis of Power Integrity of DDR5 Dual In-Line Memory Modules [12]
    Shinyoung Park, Vinod Arjun Huddar
    Rambus
  • T-I.2. Analytical Models for Embedded Discrete and Thin Film Capacitors in Multilayered Printed Circuits [69]
    Ihsan Erdin
    Celestica
  • T-I.3. Multi-lane SerDes Power Delivery Network Challenges and Decap Optimization [72]
    Akhila Purushothaman, Siddharth Rajagopalan, Mukesh Moorthy
    Synopsys
  • T-I.4. A Methodology to Optimize the Number and Placement of Decoupling Capacitors in a Multilevel Power Delivery Network [98] (Student Competition)
    Ram Krishna*, Thong Nguyen*, Atom Watanabe+,Dale Becker+, Arvind Kumar+, Elyse Rosenbaum*
    *UIUC,
    +IBM
  • T-I.5.Power Integrity and Enablement Challenges for Integrated Dual-Mode Linear Voltage Regulator in Next Generation Intel® Core Microprocessor [84]
    Deeksha Rawat, Chilla Venugopal Reddy, Vishal Gupta, Gaurav Kumar Singh
    Intel
  • T-I.6. The Eccentrics of CPU FIVR AGS supply noise debug and learnings [97]
    Druvika Pandita, Veerendra K Jonna , Kim Meng Chen ,Muzzamil Peerjade, Ashish Kumar Singh, Anil B Lingambudi
    Intel

13:00 - 13:10
Break

13:10 - 15:10
Session 2: Electro-thermo Co-Simulation & Reliability
Chair: Rohit Sharma, IIT, Ropar
  • T-II.1. A New Current Crowding Phenomenon for Flip-Chip-on-Leadframe (FCOL) Package and its Impact on Electro-migration Reliability [43]
    Sylvester Ankamah-Kusi, Koduri Sreenivasan, Rajen Murugan
    Texas Instruments
  • T-II.2. Thermal solution for Co-Packaged Optics (CPO) modules [22]
    Keiji Matsumoto, Mukta Farooq , John Knickerbocker
    IBM
  • T-II.3. Power Distribution Network Impedance Analysis considering Thermal Distribution [59] (Student Competition)
    Keeyoung Son, Daehwan Lho, Keunwoo Kim, Seonguk Choi, Haeyeon Kim, Hyunwook Park,Boogyo Sim, Hyunwoo Kim, Taein Shin, Joungho Kim
    KAIST
  • T-II.4. Thermal Analysis of DDR5 DIMM with Forced Air Cooling Method [60] (Student Competition)
    Keeyoung Son*, Daehwan Lho*, Seongguk Kim*, Joonsang Park*, Keunwoo Kim*, Namhyeon Choi+, Hyunsik Kim+, Joungho Kim*
    *KAIST,
    +SK Hynix
  • T-II.5. Efficient Discharge Waveform Distribution Measurement Using Active Machine Learning [64]
    Yuting Xie, Ling Zhang, Junhui Chen, Da Li, Zhenzhong Yang, Dan Ren, Er-Ping Li
    Zhejiang University
  • T-II.6. Electromagnetic-Thermal Co-simulation of a Patch Antenna [99]
    Xin Yi Liu*, Zheng Lang Jia*, Huan Huan Zhang*, Ying Liu*, Mei Song Tong+
    *Xidian University,
    +Tongji University

15:10 - 15:20
Break

15:20 - 17:20
Session 3 - Antenna Design and Modeling
Chair: Haeyeon Kim, KAIST
  • T-III.1. Design of 915 MHz phased conformal patch antenna array for deep tumor hyperthermia based on realistic breast model and SAR optimization [20]
    Hongan Zhou, Rui Zhang, Ye Tian, Hongli Peng
    Shanghai Jiao Tong University
  • T-III.2. Resonant subsurface terahertz absorber based on patterned graphene [37] (Student Competition)
    Xuan Wang, Yuxian Zhang,Lixia Yang, Zhixiang Huang, Naixing Feng
    Anhui University
  • T-III.3. An Approach of Developing 77GHz MIMO Radar with High Angular Resolution Ability [39]
    Xing Liao, Kuayue Liu, Qingmian Wan, Hongli Peng, JunFa Mao
    Shanghai Jiao Tong University
  • T-III.4. Analysis of the Slot on a Dual-Band Antenna [62]
    Lih-Tyng Hwang*, Chi-Hau Yang+, Yi-Ting Ciou+
    *National Sun Yat-Sen University,
    +Zylux Acoustic Corporation
  • T-III.5. A Novel 3-D Frequency Selective Structure for Radiation Leakage Suppression in Sub-6G Highly Integrated Package [75]
    Yun-Long Wu, Da Li, Yu-Di Fan, Han-Zhi Ma,Er-Ping Li
    Zhejiang University,
  • T-III.6. A Novel Miniaturized Aperture Hexagonal Frequency Selective Surface [77]
    Xiaodong An, Da Li, Li Erping
    Zhejiang University

17:20 - 17:30
Break

17:30 - 18:30
Session 4 - Poster Session
Chair: Shurun Tan, ZJUI
  • T-IV.1. A Novel High Capacitance Ratio RF MEMS Switch with Low Pull-in Voltage [11] (Student Competition)
    Chengqi Lai, Zhongliang Deng, Yucheng Wang
    Beijing University of Posts and Telecommunications
  • T-IV.2. Investigation of Chirp Stepped Signal Performance for 60GHz Millimeter Wave Radar [40]
    Kuayue Liu, Xing Liao, Qingmian Wan, Hongli Peng, Junfa Mao
    Shanghai Jiao Tong University
  • T-IV.3. A Dual-Band Compact Antenna Array with Scattering Suppression Capability In Low Band [41]
    Shiyu Sun, Hongli Peng, Hongan Zhou, Qingmian Wan
    Shanghai Jiao Tong University,
  • T-IV.4. Mode Matching Analysis of Partially Filled Waveguide for Determining Electrical Property Parameters of Penetrable Materials [46]
    Bo. O. Zhu**, Xiao Yu Li*, Min Ye*, Yun Jing Zhang+, Mei Song Tong*
    *Tongji University,
    +Soochow University,
    **Nanjing University
  • T-IV.5. A Compensation Amplifier with Automatic Zeroing and Stable Chopping [47]
    Qi Ying Liang, Mei Song Tong
    Tongji University
  • T-IV.6. Small Wireless Module Consisting of Two Highly Isolated MIMO PIFAs [63]
    Chi-Hau Yang+, Yi-Ting Ciou+, Lih-Tyng Hwang*
    *NSYSU,
    +Zylux Acoustic Corporation
  • T-IV.7. Design and Analysis of Hierarchical Power Distribution Network (PDN) for Full Wafer Scale Chip (FWSC) Module [65] (Student Competition)
    Hyunwoo Kim, Joonsang Park, Keeyoung Son, Hyunwook Park, Taein Shin, Keunwoo Kim, Jiwon Yoon, Junghyun Lee, Jonghyun Hong, Juneyoung Kim, Joungho Kim, Haeyeon Kim
    KAIST
  • T-IV.8. Fast Eye Diagram Simulation based on Latency Insertion Method [105]
    Yi Zhou, Bobi Shi, Yixuan Zhao, and Jose Schutt-Aine
    UIUC
  • T-IV.9. Artificial Intelligence Based Advanced Signal Integrity Predictions [95]
    Prerna, Nithya Ramalingam, Zaman Zaid Mulla, Archana Ganeshan, Ranjul Balakrishnan, Anoop Karunan
    Intel
  • T-IV.10. A Novel Dualband Patch Antenna with Liquid Mental and Flexible Packaging for Strain Sensing [100]
    Peng Rui Zhang, Mei Song Tong
    Tongji University

18:30 - 18:40
Day 2 Wrap Up

10:00 - 10:10
Welcome
10:10 - 10:50
Keynote Presentation
Chair: Nikita Ambasana, Intel
  • Spintronics Technology for Energy-Efficient Computing Applications: Challenges and Opportunities
    Shaloo Rakheja
    University of Illinois
11:00 - 13:00
Session 5: Advanced Simulation Methods
Chair: Thong Nguyen, University of Illinois
  • W-I.1. Passive Modeling of Interconnects Using Sum of Squares Partial Fraction Expansions [56]
    Francisco Coronado, Arif Ege Engin
    San Diego State University
  • W-I.2. Acceleration of Vector Fitting by Reusing the Householder Reflectors in Multiple QR Factorization [55]
    Chiu-Chih Chou*, Jose Schutt-Aine+
    *NCU,
    +UIUC
  • W-I.3. Training Set Optimization with Uncertainty Quantification for Machine Learning Models of Electromagnetic Structures [27] (Student Competition)
    Yiliang Guo, Osama Waqar Bhatti, Madhavan Swaminathan
    Georgia Tech
  • W-I.4. Modeling Cascade-able Transceiver Blocks With Neural Network For High Speed Link Simulation [57]
    Yixuan Zhao*, Thong Nguyen*, Hanzhi Ma+, Er-Ping Li+, Andreas Cangellaris*, Jose Schutt-Aine*
    *UIUC,
    +Zhejiang University
  • W-I.5. Deep Reinforcement Learning-based Decoupling Capacitor Optimization Method for Multi-Power Domain considering Transfer Noise in 3D-ICs [80] (Student Competition)
    Seonghi Lee, Hyunwoong Kim, Dongryul Park, Jangyong Ahn, Seunghun Ryu, Gagyeong Park, Seungyoung Ahn
    KAIST
  • W-I.6. Latency Insertion Method for FinFET DC Operating Point Simulation Based on BSIM-CMG [108]
    Yi Zhou, Jose Schutt-Aine
    UIUC

13:00 - 13:10
Break

13:10 - 15:30
Session 6 - Novel Interconnects & Signal Integrity
Chair: Chiu-Chih Chou, NCU
  • W-II.1. Statistical Method for Eye Diagram Simulation in a High-Speed Link Nonlinear System [101]
    Bobi Shi, Yi Zhou, Thong Nguyen, Jose Schutt-Aine
    UIUC
  • W-II.2. ENRZ vs. NRZ: A Performance Comparison at 112 Gbps [85]
    Sherman Chen*, Zhifei Xu**, Francesco de Paulis+
    *Kandou Bus,
    **Detoolic Technology,
    +University of l'Aquila
  • W-II.3. IC Package with the system board Interconnects -simulation showing PDN noise due to simultaneous switching IOs and its effect on Signal Integrity [26]
    Rajesh Badala Jagadeesh*, Venkatesh Ramashastry+, Bharath Ramprasad, Surya Prakash, Rao Bengaluru Srihari, Satvik Bhat,Vignesh Sunku Radhakrishna
    Tessolve Semiconductor,
  • W-II.4. Channel Impedance Optimization For 100 Gbps High-Speed Networking Interfaces [110]
    Chu Paul, Lin Eva, James Chen, Liao Chun-Lin, Bandi Sathvika, Mallikarjun Vasa, Bhyrav Mutnury
    Dell
  • W-II.5. Development and Comparative Analysis of Delay Fault Models for Variants of High Speed CNT Interconnects at Submicron Technology [53]
    Urmi Shah, Usha Mehta
    Nirma University
  • W-II.6. Hybrid Copper-Graphene Package Interconnects for Channel loss Improvement in High-Speed Serial Interfaces [114]
    Kavitha Nagarajan, Ajay Kumar Vaidhyanathan, Parthasarathy Ramaswamy, Suyash Kushwaha, Rohit Sharma
    Intel
  • W-II.7. Tapered Differential Multibit Through Glass Vias for Three-Dimensional Integrated Circuits [78]
    Ajay Kumar, Rohit Dhiman
    National Institute of Technology, Hamirpur

15:30 - 15:40
Break

15:40 - 17:00
Session 7: High-Frequency Structure Design and Measurement Techniques
Chair: Hanzhi Ma, ZJUI
  • W-III.1.2x-Thru De-embedding Uncertainty for On-Package High-Speed Interconnects [21]
    Cemil Geyik*, Michael Hill+, Zhichao Zhang+, Kemal Aygun+, James Aberle*
    *Intel,
    *Arizona State University
  • W-III.2. Radio Frequency Interference Characterization of 5G Device with Reciprocity Theorem [15]
    Michael Chang, Simon Kao, Stephen Chu, Bryant Hsu, Mark Ciou, Harrison Hu, Robby Ho
    HTC
  • W-III.3. A Novel FSS for High/Low Frequency Band Beam Transparent Scanning/Grounding [38]
    ShiYu Sun, Hongli Peng, Hongan Zhou, Qingmian Wan
    Shanghai Jiao Tong University
  • W-III.4. A high-sensitive resonant cavity for measuring the concentration of aqueous solutions [74]
    Ying Tian*, Zhang Yun Jing*, Tong Mei Song+
    *Soochow University,
    +Tongji University

17:00 - 17:10
Awards & Closing Remarks