EDAPS 2020 Tutorials & Invited Speakers
Design and Analysis of Chiplet Interfaces for Heterogeneous Systems
Speaker: Wendem Beyene
Abstract - Chipet interface allows multiple silicon dies of various technology and complexity to communicate efficiently using wider parallel buses in a single package. The second layer of interconnect on the package (silicon or organic interposer) provides dense channels as well as low impedance power delivery paths between multiple independent power domains. Although the channels are very short and the I/O power can be reduced by order of magnitude, the huge increase in the transient current in multiple dies and the unique clocking architecture makes the supply noise and timing jitter the limiting factors in designing high- performance multi-die systems. The talk discusses the unique signal and power integrity challenges of chiplet interfaces.
Wendem T. Beyene received his B.S. and M.S. degrees in Electrical Engineering from Columbia University, New York, NY and his Ph.D. degree in Electrical and Computer Engineering from University of Illinois at Urbana-Champaign, IL. In the past, he was employed by IBM, Hewlett-Packard, Agilent Technologies and Rambus Inc. He also worked as a principal Engineer with Intel Corp. managing a team working on modeling and analysis of power delivery and signaling systems of digital core and mixed-signal I/O subsystems of FPGA chips. He is an elected Associate Fellow of Ethiopian Academy of Sciences, and recently has been selected as a distinguished lecturer for IEEE Electronic Packaging Society.